I’m using the STM32F0 port with IAR. I’m trying to understand the RTOS interrupt priority in relation to the interrupt priority of the STM32F0. The port does not define configKERNELINTERRUPTPRIORITY or configMAXSYSCALLINTERRUPT_PRIORITY in FreeRTOSConfig.h. However, configKERNELINTERRUPTPRIORITY is defined to 0 in the port.c but it doesn’t look to be used and is there just as backwards compatibility. The STM32F0 has 4 interrupt priorities (0-3). I’m trying to figure out if I’m setting my ISR (non-RTOS and RTOS-calls-from) priorities correctly but I’m not sure what the priority the RTOS is running at. Help?

I don’t think the M0 has a base pri register, and looking at the source code I see interrupts are disabled in critical sections rather than masked, so I think that must be right. The set/clear interrupts from ISR macros are also globally disabling/enabling so in summary it looks like you can use any interrupt priority you like but keep the tick and pend sv interrupts at the lowest priority.

Thanks, That makes sense. So if I have an isr that calls a FreeRTOS api, does it also have to set at the lowest priority? or does it not matter because it’s not masked?

From looking at the source code I would say it can run at any priority. On M3 and M4 critical sections in interrupts mask priorities up to a set threshold, and interrupts using the API have to keep below that threshold. On M0 critical sections in interrupts mask all priorities, so there is no threshold to keep below.

I guess that means no interrupt can preempt the FreeRTOS critical sections. I will keep that in mind as I design my system. Good info. Thanks.