Hi. I’m writing a code for LPC1769 (Cortex M3) with FreeRTOS and LPCOpen library. The hard fault occurs when a FreeRTOS API function is called from an ISR.The interrupt has the same priority as the kernel (configKERNELINTERRUPTPRIORITY). The RTC interrupts make this error. This function configs the RTC: void rtcinit(){ ChipRTCInit(LPCRTC); ChipRTCCntIncrIntConfig(LPCRTC, RTCAMRCIIRIMSEC, ENABLE); ChipRTCClearIntPending(LPCRTC, RTCINTCOUNTERINCREASE | RTCINTALARM); NVICEnableIRQ((IRQnType) RTCIRQn); ChipRTCEnable(LPCRTC, ENABLE); NVICSetPriority((IRQnType)RTCIRQn,configKERNELINTERRUPT_PRIORITY); } IRQ Handler: ~~~~~~ void RTCIRQHandler(void) { uint32t sec;

if (Chip_RTC_GetIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE)) {
    Chip_RTC_ClearIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE);
}

    xSemaphoreGiveFromISR(sem_temp,NULL);    // THIS CAUSES THE ERROR.
}

} ~~~~~~ FreeRTOSConfig.h file: http://paste.ofcode.org/DEERe56y3X8Eg7tXZgBRHd Sorry for my bad english. Thanks!

NVICSetPriority((IRQnType)RTCIRQn,configKERNELINTERRUPT_PRIORITY);

That line will not be right if configKERNELINTERRUPTPRIORITY is defined using all 8 bits, as it normally is. NVIC_SetPriority wants the priority specified using just the number of bits implemented by your LPC part. See http://www.freertos.org/RTOS-Cortex-M3-M4.html and make sure you are using a recent FreeRTOS version to take advantage of the extra self checking with configASSERT() defined.

Ok I’ll try that. Thanks!