Security for Arm Cortex-M devices with FreeRTOS
Securing microcontrollers is a challenge, hampered in part by lack of hardware enforced security domains. Creating two security domains typically requires two microprocessors each with a separate Memory Protection Unit (MPU). Arm TrustZone, introduced with the Armv8-M architecture, enables two security processing environments on a single Cortex-M processor (see Using FreeRTOS on Armv8-M Microcontrollers). Once […]
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