Hello r.barry, Can FreeRTOS use HT-TECH picc18 complier instead of mcc18 complier for pic18 port? Best regard!

Hi, There is currently no port for the HI TECH compiler, but no reason I know of why one could not be produced.  This would however take some effort. Best regards.

I was told that since you can’t access the stack in Hi-Tech, you can’t use a pre-emptive RTOS.

I’m not familiar with this compiler but if it does not allow you to access the stack then portions of the port would have to be written in assembly.  The IAR ARM7 port is similar.  Here the inline assembly cannot access the required C variables so wrappers are written in assembly, and these just call the C functions.  The stack management is handled by asm macros.  The other ports don’t have assembly files.

They use what they call a "Compiled Stack."  I think that means that there is no stack.  There is a fixed call tree instead.    But I’m not sure exactly what that means.

I’m actually working on a port to the HT-Soft PICC18 compiler for FreeRTOS.  I’ve gotten it to a point where I’ve run into an issue with the software stack.  I don’t understand how the MPLAB C18 compiler would work here either. What I see is that the linker script provided looks like it assigns the firxt 0x60 bytes at the top of the BIG_BLOCK (Heap) to be a stack.  Then, in the code (demo#1) the first mention or access of the stack is in the xSerialPortInitMinimal-> xQueueCreate-> pvPortMalloc-> vTaskSuspendAll-> portENTER_CRITICAL function/macro at the first queue creation.  This macro assigns INTCON to POSTINC1 without initializing FSR1 in any visible way.  I don’t see how this could work at all.  Does the MPLAB C18 assign FSR1 magically and permanently to the stack based on the linker request?  Wouldn’t a section of the heap need to ba allocated as a software stack, and the FSR pointed to the right location before access?  Otherwise, how can one be sure the compiler hasn’t hijacked the FSR for some other purpose in the compiled code since last access? Can someone help?

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It has been some time since I looked at the PIC port, but I recall that the port code just uses the same programmers model as the compiler.  You would have to check the C18 documentation but I’m petty sure that this register is used as the stack pointer by the compiler and therefore setup by the C init routines before main() is called.  The compiler always expects this to point to the stack from that point on and never uses the register for anything else.

I have looked and what you describe is correct, although I’m somewhat suprised by the convention.  I’ve also found that the PICC18 uses a hybrid of the internal hardware stack (for function return addresses) and a compiled stack (for data params).  I’m not sure how to account for that in FreeRTOS yet.  This comparison of PICC18 and C18 may also be useful: http://www.xargs.com/pic/picc18-vs-c18.html.