Hi guys
I have a sam7x256-ek, i use ARM7_AT91SAM7X256_Eclipse demo project’s makefile and linker but output says;
my vector table is in 0x100000, what must i do to place it in 0x00000 ?
Thanks
Vector Table Misplaced
Vector Table Misplaced
Check the SAM7X user manual. Normally the vector table can be remapped, and it might be getting remapped by your start up code. Also, it might be that 0x100000 is aliased at 0x0000 already?
Vector Table Misplaced
Thanks edwards3, you are right as you can see, i found this part in my linker script;
startup : { *(.startup)} > flash
i change this flash part with my own code like;
MEMORY
{
start : ORIGIN = 0x00000000, LENGTH = 256
flash : ORIGIN = 0x00100000, LENGTH = 256K
ram : ORIGIN = 0x00200000, LENGTH = 64K
} __stack_end__ = 0x20FFFC; SECTIONS
{
. = 0;
startup : { *(.startup)} > start prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
_etext = .;
} >flash __end_of_text__ = .; .data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash .bss :
{
__bss_beg__ = .;
*(.bss)
} >ram . = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > ram /* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .); my exceptions’ adresses changed but not exactly fit in correctly, disassembly outputs: 168 _vec_reset: b start /* RESET vector – must be at 0x00000000 */
00000000: b 0x54
169 _vec_undef: b AT91F_Undef_Handler /* Undefined Instruction vector */
00000004: b 0x4
170 _vec_swi: b vPortYieldProcessor /* Software Interrupt vector */
00000008: b 0x168
171 _vec_pabt: b AT91F_Pabt_Handler /* Prefetch abort vector */
0000000c: b 0xc
172 _vec_dabt: b AT91F_Dabt_Handler /* Data abort vector */
00000010: b 0x10
173 _vec_rsv: nop /* Reserved vector */
00000014: b 0x14
174 _vec_irq: b AT91F_Irq_Handler /* Interrupt Request (IRQ) vector */
00000018: b 0x18
175 _vec_fiq: b _vec_fiq /* Fast interrupt request (FIQ) vector */ exceptions are between correct addresses, i dont know what caused it or how it’s going to be fix it ? Thanks for your helps
{
start : ORIGIN = 0x00000000, LENGTH = 256
flash : ORIGIN = 0x00100000, LENGTH = 256K
ram : ORIGIN = 0x00200000, LENGTH = 64K
} __stack_end__ = 0x20FFFC; SECTIONS
{
. = 0;
startup : { *(.startup)} > start prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
_etext = .;
} >flash __end_of_text__ = .; .data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash .bss :
{
__bss_beg__ = .;
*(.bss)
} >ram . = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > ram /* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .); my exceptions’ adresses changed but not exactly fit in correctly, disassembly outputs: 168 _vec_reset: b start /* RESET vector – must be at 0x00000000 */
00000000: b 0x54
169 _vec_undef: b AT91F_Undef_Handler /* Undefined Instruction vector */
00000004: b 0x4
170 _vec_swi: b vPortYieldProcessor /* Software Interrupt vector */
00000008: b 0x168
171 _vec_pabt: b AT91F_Pabt_Handler /* Prefetch abort vector */
0000000c: b 0xc
172 _vec_dabt: b AT91F_Dabt_Handler /* Data abort vector */
00000010: b 0x10
173 _vec_rsv: nop /* Reserved vector */
00000014: b 0x14
174 _vec_irq: b AT91F_Irq_Handler /* Interrupt Request (IRQ) vector */
00000018: b 0x18
175 _vec_fiq: b _vec_fiq /* Fast interrupt request (FIQ) vector */ exceptions are between correct addresses, i dont know what caused it or how it’s going to be fix it ? Thanks for your helps
Vector Table Misplaced
Sorry, my mistake i forget to set GPNVM bit 2 for flash bootlooding.
Thanks for your helps